1. Field of the Invention
The present invention relates to a semiconductor substrate and a method of manufacturing the same. More particularly, the present invention relates to a method of manufacturing a semiconductor substrate suitable for dielectric isolation, or electronic devices or integrated circuits formed on a single-crystal semiconductor layer on an insulator.
2. Description of the Related Art
Formation of single-crystal semiconductor layers on an insulator is widely known as silicon on insulator (SOI) technology. Since devices utilizing SOI technology have numerous advantages which- cannot be achieved by bulk Si substrates from which ordinary Si integrated circuits (xe2x80x9cICxe2x80x9d) are produced, considerable research has been carried out. By utilizing SOI technology, the following advantages can be obtained.
{circle around (1)} dielectric isolation is easy, and high integration is possible,
{circle around (2)} high resistance to radiation,
{circle around (3)} floating capacity is reduced and high speed is possible,
{circle around (4)} well step can be omitted
{circle around (5)} latch up can be prevented, and
{circle around (6)} complete-depletion-type field-effect transistor due to thin films can be manufactured.
To realize the above-described numerous advantages, research has been conducted on a method of forming an SOI structure. Examples of the most advanced SOI structure are the SIMOX (Separation by Ion Implanted Oxygen) method and a substrate lamination method.
The SIMOX method is a method of forming a SiO2 layer by implanting oxygen ions into an Si single-crystal substrate. Since this method conforms well to Si processes, this is the most frequently used method at the present time. However, to form a SiO2 layer, it is necessary to implant oxygen ions in an amount of 1018 ions/cm2 or more. The implantation time is very long, productivity cannot be said to be high, and wafer cost is high. In addition, a great amount of crystal defects may be left, and sufficient quality at which minority carrier devices can be manufactured is not achieved from an industrial point of view.
A substrate lamination method is a simple method of forming an SOI substrate by laminating an oxidized semiconductor substrate with a substrate with a similar thermal expansion coefficient. Since the surface characteristic of the substrate affects the contact characteristic, the surface characteristic needs to be improved.
In the above-described method of manufacturing a semiconductor substrate by lamination, lamination strength deteriorates due to the surface characteristic of the substrate. The surface characteristics means smoothness (RMS), degree of contaminants, particles and the like on the surface of a wafer. Although surface polishing is performed to improve the surface characteristics of the wafer, it is difficult to improve the surface characteristics over the entire surface of the wafer.
In addition, when devices are fabricated in this substrate, the substrate is peeled off from where the lamination strength is weak, damaging the device and decreasing the yield of devices (ICs). As a result, the cost of the SOI device (IC) increases.
FIGS. 6(a) and 6(b) are schematic sectional views of a region where lamination strength is weak in the prior art. FIGS. 6(a) and 6(b) show a state in which a substrate 202 is laminated on a substrate 201. As shown in FIG. 6(a), there is a portion 203 where lamination strength is weak. As shown in FIG. 6(b), the substrate 202 is destroyed in a step of manufacturing devices, forming broken pieces 204 which damage the device region.
It is an object of present invention to prevent the portion where lamination strength is weak from being peeled off, to increase the yield of devices and to reduce costs in a method of manufacturing a semiconductor substrate by a lamination method.
It is another object of present invention to provide a semiconductor substrate manufacturing method which is capable of stably manufacturing SOI substrates.
It is still another object of present invention to provide a semiconductor substrate manufacturing method comprising the steps of: laminating a plurality of substrates, and selectively removing a portion where lamination strength is weak.
A method of manufacturing a semiconductor substrate in accordance with the present invention comprises the steps of: laminating a first substrate having a single-crystal semiconductor region with a second substrate having an insulator region, and selectively removing the portion of the first substrate of the laminated substrates where lamination strength is weak, wherein the diameter of the first laminated substrate is smaller than that of the second laminated substrate.
The method of the present invention makes it possible to manufacture a semiconductor substrate in such a way that the device region is not damaged by removing a portion where lamination strength is weak before devices are fabricated thereon.
FIGS. 5(a) and 5(b) illustrate an example of the method of the present invention, also showing a state in which a first substrate 102 having a single-crystal semiconductor is laminated with an insulator, second substrate 101. In the present invention, by finding a portion 103 where lamination strength is weak before devices are fabricated thereon and removing the region to form an opening portion 104, destruction of the substrates can be prevented.
In addition, use of the method of the present invention makes it possible to improve the yield of devices above by removing beforehand a region with poor surface characteristic such as the outer peripheral portion of the wafer. When removing the outer peripheral portion of the laminated portion, it is preferable that this portion be removed in an amount of 1 mm or more.
In the method of the present invention, the portion where lamination strength is weak may be removed by etching or by mechanical polishing.
In the method of the present invention, it is effective to etch an SOI layer to a chip size before an SOI device manufacturing step. Further, it is effective to remove by etching regions (element separation portion, and the like) with a necessary SOI region left. Pattern defects resulting from film peeling are reduced sharply by removing in advance before the device is produced.
The above and further objects, aspects and novel features of the invention will more fully appear from the following detailed description when the same is read in connection with the accompanying drawings. It is to be expressly understood, however, that the drawings are for the purpose of illustration only and are not intended to limit the invention.